data sheet gaas integrated circuit p p p p pg100p, p p p p pg101p wide band amplifier chips 1992 ? document no. p12402ej2v0ds00 (2nd edition) (previous no. ic-3144) date published february 1997 n printed in japan data sheet description p pg100p and p pg101p are gaas integrated circuits designed as wide band amplifiers. both devices are available in chip form. p pg100p is low noise amplifier from 50 mhz to 3 ghz and p pg101p is a medium power amplifier in the same frequency band. these devices are most suitable for the if stage of microwave communication system and the measurement equipment. features ? wide band : f = 50 mhz to 3 ghz ordering information part number form p pg100p chip p pg101p chip absolute maximum ratings (t a = 25 c) p pg100p p pg101p drain voltage v dd +8 +10 v gate voltage v gg e 8 e 8v input voltage v in e 3 to +0.6 e 5 to +0.6 v input power p in +15 +15 dbm total power dissipation p tot *1 1.5 1.5 w operating temperature t opr *2 e 65 to +125 e 65 to +125 c storage temperature t stg e 65 to +175 e 65 to +175 c *1 mounted with ausn hard solder *2 the temperature of base material baside the chip
2 p p p p pg100p , p p p p pg101p electrical characteristics (t a = 25 c) *3 p pg100p (v dd = +5 v, v gg = e 5 v) characteristics symbol min. typ. max. unit test conditions drain current i dd 30 45 60 ma rf off gate current i gg 0.7 1.5 ma power gain gp 14 16 db f = 0.05 to 3 ghz gain flatness ' gp r 1.5 db noise figure nf 2.7 3.5 db input return loss rl in 710 db output return loss rl out 710 db isolation i sol 30 40 db output power at 1 db gain compression point p o(1 db) +3 +6 dbm p pg101p (v dd = +8 v, v gg = e 5 v) characteristics symbol min. typ. max. unit test conditions drain current i dd 70 100 140 ma rf off gate current i gg 1.0 3.0 ma power gain gp 12 14 db f = 0.05 to 3 ghz gain flatness ' gp r 1.5 db noise figure nf 5 7 db input return loss rl in 68 db output return loss rl out 68 db isolation i sol 30 40 db output power at 1 db gain compression point p o(1 db) +16 +18 dbm *3 these characteristics are based on performance of devices mounted in the standard package shown in fig. 1.
3 p p p p pg100p , p p p p pg101p fig. 1 8 pin ceramic package 3 4 2 7 6 1 5 1.27 0.1 1.27 0.1 4?.6 3.8 0.2 4?.4 8 10.6 max. 1.7 max. 0.2 +0.05 ?.02
4 p p p p pg100p , p p p p pg101p typical characteristics *4 p pg100p (v dd = +5 v, v gg = e 5 v) 20 10 0 10 20 50 100 200 500 1000 2000 5000 10 5 power gain and noise figure vs. frequency f - frequency - mhz g p - power gain - db nf ?noise figure ?db t a = ?5 c t a = +25 c t a = +75 c g p nf 0 40 10 20 50 100 200 500 1000 2000 5000 input and output return loss vs. frequency f - frequency - mhz rl - return loss - db 10 20 30 10 50 10 20 50 100 200 500 1000 5000 2000 isolation vs. frequency f - frequency - mhz i sol - isolation - db 20 30 40 ?0 ?0 output power vs. input power p i - input power - dbm p o - output power - dbm ?0 0 +10 0 rl out rl in f = 1 ghz f = 2 ghz f = 3 ghz
5 p p p p pg100p , p p p p pg101p p pg101p (v dd = +8 v, v gg = e 5 v) 0 10 20 50 100 200 500 1000 2000 5000 10 power gain and noise figure vs. frequency f - frequency - mhz g p - power gain - db nf - noise figure - db nf 10 20 g p 0 40 10 20 50 100 200 500 1000 2000 5000 input and output return loss vs. frequency f - frequency - mhz rl - return loss - db 10 20 30 rl out rl in 10 60 10 20 50 100 200 500 1000 2000 5000 isolation vs. frequency f - frequency - mhz i sol - isolation - db 20 30 40 0 ?0 output power vs. input power p i - input power - dbm p o - output power - dbm 010 20 10 5 0 50 t a = ?5 c t a = +25 c t a = +75 c f = 1 ghz f = 2 ghz f = 3 ghz *4 these characteristics are measured for device mounted in the standard package shown in fig. 1.
6 p p p p pg100p , p p p p pg101p chip dimensions (unit : mm) p pg100p 8 9 10 1 23 4 1.3 1: in 2: gnd 3: gnd 4: v gg 5: gnd 6: gnd 7: out 8: gnd 9: v dd 10: gnd 1.0 56 7 bonding pad size: 100 m 100 m mm p pg101p 8 9 10 1 23 4 1.3 1: in 2: gnd 3: gnd 4: v gg 5: gnd 6: gnd 7: out 8: gnd 9: v dd 10: gnd 1.0 56 7 bonding pad size: 100 m 100 m mm
7 p p p p pg100p , p p p p pg101p recommended chip assembly conditions die attachment atmosphere : n 2 gas temperature : 320 r 5 c ausn preform : 0.5 u 0.5 u 0.05 t (mm), 2 pcs. * the hard solder such as ausi or auge which has higher melting point than ausn should not be used. base material : cuw, cu, kv * other material should not be used. epoxy die attach is not recommended. bonding machine : tcb * usb is not recommended wire : 30 p m diameter au wire temperature : 260 r 5 c strength : 31 r 3 g atmosphere : n 2 gas quality assurance (refer to get-30116) 1. 100 % tests 1-1 100 % dc and rf probe 1-2 visual inspection mil-std-883/method 2010 condition b 2. tests on sampling basis 2-1 bond pull tests (in case of recommended chip handling) mil-std-883 method 2011 5 samples/wafer and 20 points tested accept 0/reject 1 2-2 tests in standard package test the electrical characteristics of chips assembled into the standard package used for p pg100b and p pg101b. 5 samples/wafer tested dc and rf measurement accept 1/reject 2 3. warrantee nec has a responsibility of quality assurance for the products within 180 days after delivered to customers where these are handled properly and stored in the desicater with the flow of dry n 2 gas. 4. caution 4-1 take great care to prevent static electricity. 4-2 be sure that die attach is performed in n 2 atmosphere.
p p p p pg100p , p p p p pg101p no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96. 5
|
